Experienced RTL designers with knowledge of best practices with respect to implementation of digital logic. Strong knowledge of ASIC test methodology such as scan, memory BIST and test pattern generation. Experience in processors, networking and high speed I/O is preferred.
Experienced Analog Mixed Signal (AMS) verificatioin engineer with background in transceiver applications.
Experience in high performance & high speed ADC, DAC, SERDES, Analog Front end (CTLE, AGC), Phase-locked Loop is preferred.
Strong knowledge of ASIC verification tools and design flow. Fluency in system Verilog/UVM. Pre-silicon and post silicon bring up and production activities.
Characterization and productization of SerDes and other High-Speed interfaces
Experienced Analog Layout professionals.
