Experienced RTL designers with knowledge of best practices with respect to implementation of digital logic. Strong knowledge of ASIC test methodology such as scan, memory BIST and test pattern generation. Experience in processors, networking and high speed I/O is preferred.
Experienced DSP and systems architect with knowledge of wired and wireless connectivity algorithms.
Experience in high performance & high speed ADC, DAC, SERDES, Analog Front end (CTLE, AGC), Phase-locked Loop is preferred.
Strong knowledge of ASIC verification tools and design flow. Fluency in system Verilog/UVM. Pre-silicon and post silicon bring up and production activities.
Strong network knowledge, fluency in C/C++ for Linux, experience with I2C, MDIO, SPI, JTAG, experience with embedded microcontroller development.
Experienced Analog Layout professionals.